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10 A, Rail-to-Rail I/O, Zero Input Crossover Distortion Amplifiers ADA4505-2/ADA4505-4
FEATURES
PSRR: 100 dB minimum CMRR: 105 dB typical Very low supply current: 10 A per amplifier maximum 1.8 V to 5 V single-supply or 0.9 V to 2.5 V dual-supply operation Rail-to-rail input and output 3 mV offset voltage maximum Very low input bias current: 0.5 pA typical
PIN CONFIGURATIONS
OUT A 1 -IN A 2 +IN A 3 V- 4
8
V+ OUT B +IN B
07416-004
ADA4505-2
TOP VIEW (Not to Scale)
7 6 5
-IN B
Figure 1. 8-Lead MSOP (RM-8)
BALL A1 CORNER OUT B A1 -IN B B1 +IN B C1 V- C2 V+ A2 OUT A A3 -IN A B3 +IN A C3
APPLICATIONS
Pressure and position sensors Remote security Medical monitors Battery-powered consumer equipment Hazard detectors
TOP VIEW (BALL SIDE DOWN)
Figure 2. 8-Ball WLCSP (CB-8-2)
OUT A 1 -IN A +IN A
2 3 14 13
OUT D -IN D +IN D V- +IN C -IN C OUT C
07416-005
ADA4505-4
TOP VIEW (Not to Scale)
12 11 10 9 8
V+ 4 +IN B 5 -IN B
6
OUT B 7
Figure 3. 14-Lead TSSOP (RU-14)
GENERAL DESCRIPTION
The ADA4505-2/ADA4505-4 are dual and quad micropower amplifiers featuring rail-to-rail input and output swings while operating from a single 1.8 V to 5 V power supply or from dual 0.9 V to 2.5 V power supplies. Employing a new circuit technology, these low cost amplifiers offer zero input crossover distortion (excellent PSRR and CMRR performance) and very low bias current, while operating with a supply current of less than 10 A per amplifier. This combination of features makes the ADA4505-2/ADA4505-4 amplifiers ideal choices for battery-powered applications because they minimize errors due to power supply voltage variations over the lifetime of the battery, and maintain high CMRR even for a rail-to-rail op amp.
Remote battery-powered sensors, handheld instrumentation and consumer equipment, hazard detectors (for example, smoke, fire, and gas), and patient monitors can benefit from the features of the ADA4505-2/ADA4505-4 amplifiers. The ADA4505-2/ADA4505-4 are specified for both the industrial temperature range (-40C to +85C) and the extended industrial temperature range (-40C to +125C). The ADA4505-2 dual amplifier is available in standard 8-lead MSOP and 8-ball WLCSP packages. The ADA4505-4 quad amplifier is available in a 14-lead TSSOP package. The ADA4505-2/ADA4505-4 are members of a growing series of zero crossover op amps offered by Analog Devices, Inc., including the AD8506/AD8508, which also operate from a single 1.8 V to 5 V power supply or from dual 0.9 V to 2.5 V power supplies.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved.
07416-003
ADA4505-2
ADA4505-2/ADA4505-4 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Pin Configurations ........................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics--5 V Operation................................ 3 Electrical Characteristics--1.8 V Operation ............................ 4 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution...................................................................................5 Typical Performance Characteristics ..............................................6 Theory of Operation ...................................................................... 14 Applications Information .............................................................. 16 Pulse Oximeter Current Source ............................................... 16 Four-Pole Low-Pass Butterworth Filter for Glucose Monitor ................................................................... 17 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 19
REVISION HISTORY
10/08--Rev. 0 to Rev. A Added ADA4505-4, 8-Ball WLCSP, and 14-Lead TSSOP .............................................................. Throughout Change to Features Section ............................................................. 1 Added Figure 2 and Figure 3; Renumbered Sequentially ........... 1 Changes to Table 1 ............................................................................ 3 Changes to Table 2 ............................................................................ 4 Changes to Thermal Resistance Section........................................ 5 Changes to Figure 22 and Figure 25 ............................................... 9 Changes to Figure 40 and Figure 43 ............................................. 12 Deleted Figure 46 and Figure 48 ................................................... 13 Change to Theory of Operation Section ..................................... 14 Changes to Figure 52 ...................................................................... 16 Change to Four-Pole Low-Pass Butterworth Filter for Glucose Monitor Section ......................................................... 17 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 19 7/08--Revision 0: Initial Version
Rev. A | Page 2 of 20
ADA4505-2/ADA4505-4 SPECIFICATIONS
ELECTRICAL CHARACTERISTICS--5 V OPERATION
VSY = 5 V, VCM = VSY/2, TA = 25C, RL = 100 k to GND, unless otherwise specified. Table 1.
Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Symbol VOS IB -40C TA +85C -40C TA +125C Input Offset Current IOS -40C TA +85C -40C TA +125C -40C TA +125C 0 V VCM 5 V -40C TA +85C -40C TA +125C 0.05 V VOUT 4.95 V -40C TA +125C -40C TA +125C 0.05 Test Conditions/Comments 0 V VCM 5 V -40C TA +125C Min Typ 0.5 0.5 Max 3 4 2 50 375 1 25 130 5 Unit mV mV pA pA pA pA pA pA V dB dB dB dB dB V/C G pF pF V V V V mV mV mV mV mA dB dB dB A A mV/s kHz Degrees V p-p nV/Hz fA/Hz
Input Voltage Range Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain Offset Voltage Drift Input Resistance Input Capacitance Differential Mode Input Capacitance Common Mode OUTPUT CHARACTERISTICS Output Voltage High
AVO VOS/T RIN CINDM CINCM VOH
0 90 90 85 105 100
105
120 2 220 2.5 4.7
Output Voltage Low
VOL
Short-Circuit Limit POWER SUPPLY Power Supply Rejection Ratio
ISC PSRR
RL = 100 k to GND -40C TA +125C RL = 10 k to GND -40C TA +125C RL = 100 k to VSY -40C TA +125C RL = 10 k to VSY -40C TA +125C VOUT = VSY or GND VSY = 1.8 V to 5 V -40C TA +85C -40C TA +125C VOUT = VSY/2 -40C TA +125C RL = 100 k, CL = 20 pF, G = 1 RL = 1 M, CL = 20 pF, G = 1 RL = 1 M, CL = 20 pF, G = 1 f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz
4.98 4.98 4.9 4.9
4.99 4.95 2 10 40 5 5 25 25
100 100 95
110
Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
ISY
7
10 15
SR GBP M en p-p en in
6 50 52 2.95 65 20
Rev. A | Page 3 of 20
ADA4505-2/ADA4505-4
ELECTRICAL CHARACTERISTICS--1.8 V OPERATION
VSY = 1.8 V, VCM = VSY/2, TA = 25C, RL = 100 k to GND, unless otherwise specified. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Symbol VOS IB -40C TA +85C -40C TA +125C Input Offset Current IOS -40C TA +85C -40C TA +125C -40C TA +125C 0 V VCM 1.8 V -40C TA +85C -40C TA +125C 0.05 V VOUT 1.75 V -40C TA +125C -40C TA +125C 0.05 Test Conditions/Comments 0 V VCM 1.8 V -40C TA +125C Min Typ 0.5 0.5 Max 3 4 2 50 375 1 25 130 1.8 Unit mV mV pA pA pA pA pA pA V dB dB dB dB dB V/C G pF pF V V V V mV mV mV mV mA dB dB dB A A mV/s kHz Degrees V p-p nV/Hz fA/Hz
Input Voltage Range Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain Offset Voltage Drift Input Resistance Input Capacitance Differential Mode Input Capacitance Common Mode OUTPUT CHARACTERISTICS Output Voltage High
AVO VOS/T RIN CINDM CINCM VOH
0 85 85 80 95 95
100
115 2.5 220 2.5 4.7
Output Voltage Low
VOL
Short-Circuit Limit POWER SUPPLY Power Supply Rejection Ratio
ISC PSRR
RL = 100 k to GND -40C TA +125C RL = 10 k to GND -40C TA +125C RL = 100 k to VSY -40C TA +125C RL = 10 k to VSY -40C TA +125C VOUT = VSY or GND VSY = 1.8 V to 5 V -40C TA +85C -40C TA +125C VOUT = VSY/2 -40C TA +125C RL = 100 k, CL = 20 pF, G = 1 RL = 1 M, CL = 20 pF, G = 1 RL = 1 M, CL = 20 pF, G = 1 f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz
1.78 1.78 1.65 1.65
1.79 1.75 2 12 3.8 5 5 25 25
100 100 95
110
Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
ISY
7
10 15
SR GBP M en p-p en in
6.5 50 52 2.95 65 20
Rev. A | Page 4 of 20
ADA4505-2/ADA4505-4 ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Supply Voltage Input Voltage Input Current1 Differential Input Voltage2 Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec)
1
THERMAL RESISTANCE
Rating 5.5 V VSY 0.1 V 10 mA VSY Indefinite -65C to +150C -40C to +125C -65C to +150C 300C
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. This was measured using a standard 2-layer board, unless otherwise specified. Table 4. Thermal Resistance
Package Type 8-Lead MSOP (RM-8) 8-Ball WLCSP (CB-8-2) 2-Layer PCB (1SOP) 4-Layer PCB (2SOP) 14-Lead TSSOP (RU-14)
1
JA 206 178 82 180
JB1 N/A 42 23 N/A
JC 44 N/A N/A 35
Unit C/W C/W C/W C/W
Input pins have clamp diodes to the supply pins. Input current should be limited to 10 mA or less whenever the input signal exceeds the power supply rail by 0.5 V. 2 Differential input voltage is limited to 5 V or the supply voltage, whichever is less.
Junction-to-board thermal resistance.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
Rev. A | Page 5 of 20
ADA4505-2/ADA4505-4 TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25C, unless otherwise noted.
140 120
NUMBER OF AMPLIFIERS
VSY = 1.8V VCM = VSY/2
140 120
NUMBER OF AMPLIFIERS
VSY = 5V VCM = VSY/2
100 80 60 40 20 0 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0 0.5 VOS (mV)
100 80 60 40 20 0 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0 0.5 VOS (mV)
07416-007
1.0
1.5
2.0
2.5 3.0
1.0
1.5
2.0
2.5 3.0
Figure 4. Input Offset Voltage Distribution
14 12
NUMBER OF AMPLIFIERS
Figure 7. Input Offset Voltage Distribution
14 12
NUMBER OF AMPLIFIERS
VSY = 1.8V -40C TA 125C
VSY = 5V -40C TA 125C
10 8 6 4 2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 TCVOS (V/C) 4.5 5.0 5.5 6.0
10 8 6 4 2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 TCVOS (V/C) 4.5 5.0 5.5 6.0
07416-009
Figure 5. Input Offset Voltage Drift Distribution
1500 VSY = 1.8V 1000 DEVICE 1 DEVICE 2 DEVICE 3 DEVICE 4 DEVICE 5 DEVICE 6 DEVICE 7 DEVICE 8 DEVICE 9 DEVICE 10
Figure 8. Input Offset Voltage Drift Distribution
1500 VSY = 5V 1000 DEVICE 1 500 DEVICE 2 DEVICE 3 DEVICE 4 DEVICE 5 DEVICE 6 DEVICE 7 DEVICE 8 DEVICE 9 DEVICE 10 -1000
500
VOS (V)
VOS (V)
0
0
-500
-500
-1000
07416-011
0
0.2
0.4
0.6
0.8 1.0 VCM (V)
1.2
1.4
1.6
1.8
0
1
2 VCM (V)
3
4
5
Figure 6. Input Offset Voltage vs. Common-Mode Voltage
Figure 9. Input Offset Voltage vs. Common-Mode Voltage
Rev. A | Page 6 of 20
07416-012
-1500
-1500
07416-010
07416-008
ADA4505-2/ADA4505-4
TA = 25C, unless otherwise noted.
1000 VSY = 1.8V
1000
IB+ IB-
VSY = 5V
IB+ IB-
100
100
IB (pA)
10
IB (pA)
07416-013
10
1
1
0
25
50 75 TEMPERATURE (C)
100
125
0
25
50 75 TEMPERATURE (C)
100
125
Figure 10. Input Bias Current vs. Temperature
1000 125C 100 105C 1000
Figure 13. Input Bias Current vs. Temperature
VSY = 1.8V IB+ AND IB-
125C 100 105C
VSY = 5V IB+ AND IB-
IB (pA)
IB (pA)
10
85C
10 85C
1 25C
07416-014
1 25C
07416-016 07416-018
0.1
0
0.2
0.4
0.6
0.8 1.0 VCM (V)
1.2
1.4
1.6
1.8
0.1
0
1
2 VCM (V)
3
4
5
Figure 11. Input Bias Current vs. Common-Mode Voltage and Temperature
10k VSY = 1.8V 1k
Figure 14. Input Bias Current vs. Common-Mode Voltage and Temperature
10k
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV)
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV)
VSY = 5V
1k
100
100
10
10
1 -40C +25C +85C +125C 0.01 0.1 1 LOAD CURRENT (mA) 10 100
07416-017
1 -40C +25C +85C +125C 0.01 0.1 1 LOAD CURRENT (mA) 10 100
0.1
0.1
0.01 0.001
0.01 0.001
Figure 12. Output Voltage (VOH) to Supply Rail vs. Load Current and Temperature
Figure 15. Output Voltage (VOH) to Supply Rail vs. Load Current and Temperature
Rev. A | Page 7 of 20
07416-015
0.1
0.1
ADA4505-2/ADA4505-4
TA = 25C, unless otherwise noted.
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
10k
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
VSY = 1.8V
10k
VSY = 5V
1k
1k
100
100
10
10
1 -40C +25C +85C +125C
07416-019
1 -40C +25C +85C +125C 0.01 0.1 1 LOAD CURRENT (mA) 10 100
07416-020
0.1
0.1
0.01 0.001
0.01
0.1 1 LOAD CURRENT (mA)
10
100
0.01 0.001
Figure 16. Output Voltage (VOL) to Supply Rail vs. Load Current and Temperature
1.800
Figure 19. Output Voltage (VOL) to Supply Rail vs. Load Current and Temperature
5.000
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (V)
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (V)
RL = 100k 1.795
4.995
RL = 100k
4.990
1.790
4.985
RL = 10k
1.785
RL = 10k
4.980
1.780 VSY = 1.8V
07416-021
4.975 VSY = 5V -25 -10 5 20 35 50 65 TEMPERATURE (C) 80 95 110 125
07416-022
1.775 -40
-25
-10
5
20 35 50 65 TEMPERATURE (C)
80
95
110
125
4.970 -40
Figure 17. Output Voltage (VOH) to Supply Rail vs. Temperature
25 VSY = 1.8V 20
Figure 20. Output Voltage (VOH) to Supply Rail vs. Temperature
25 VSY = 5V 20
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
15
RL = 10k
15
RL = 10k
10
10
5 RL = 100k
07416-023
5 RL = 100k
07416-024
0 -40
-25
-10
5
20 35 50 65 TEMPERATURE (C)
80
95
110
125
0 -40
-25
-10
5
20 35 50 65 TEMPERATURE (C)
80
95
110
125
Figure 18. Output Voltage (VOL) to Supply Rail vs. Temperature
Figure 21. Output Voltage (VOL) to Supply Rail vs. Temperature
Rev. A | Page 8 of 20
ADA4505-2/ADA4505-4
TA = 25C, unless otherwise noted.
100 80 60 VSY = 1.8V 225 180 135 90
100 80 60
VSY = 5V
225 180 135
OPEN-LOOP GAIN (dB)
40 20 0 -20 -40 -60 -80 GAIN
OPEN-LOOP GAIN (dB)
PHASE
40 20 0 -20 -40 -60 -80 GAIN
PHASE
90 45 0 -45 -90
PHASE (Degrees)
45 0 -45 -90
-135 -180
07416-025
-135 -180 1k 10k FREQUENCY (Hz) 100k
07416-026
07416-030
-100 100
1k
10k FREQUENCY (Hz)
100k
-225 1M
-100 100
-225 1M
Figure 22. Open-Loop Gain and Phase vs. Frequency
60 50 40 G = -100 VSY = 1.8V 60 50 40
Figure 25. Open-Loop Gain and Phase vs. Frequency
VSY = 5V G = -100
CLOSED-LOOP GAIN (dB)
CLOSED-LOOP GAIN (dB)
30 20 10 0 -10 -20 -30 -40 -50
07416-027
30 20 10 0 -10 -20 -30 -40 -50
G = -10
G = -10
G = -1
G = -1
1k
10k FREQUENCY (Hz)
100k
1M
1k
10k FREQUENCY (Hz)
100k
1M
Figure 23. Closed-Loop Gain vs. Frequency
10k 10k G = -10 1k G = -100 100 G = -1
ZOUT ()
Figure 26. Closed-Loop Gain vs. Frequency
VSY = 1.8V
VSY = 5V
G = -10
1k
G = -100 100 G = -1 10
ZOUT ()
10
1
1
07416-029
0.1 10
100
1k 10k FREQUENCY (Hz)
100k
1M
0.1 10
100
1k 10k FREQUENCY (Hz)
100k
1M
Figure 24. Output Impedance vs. Frequency
Figure 27. Output Impedance vs. Frequency
Rev. A | Page 9 of 20
07416-028
-60 100
-60 100
PHASE (Degrees)
ADA4505-2/ADA4505-4
TA = 25C, unless otherwise noted.
120 VSY = 1.8V 100 100 120 VSY = 5V
80
80
60
CMRR (dB)
07416-031
CMRR (dB)
60
40
40
20
20
1k
10k FREQUENCY (Hz)
100k
1M
1k
10k FREQUENCY (Hz)
100k
1M
Figure 28. CMRR vs. Frequency
120
120
Figure 31. CMRR vs. Frequency
VSY = 1.8V
100
VSY = 5V
100
80 PSRR (dB)
80
PSRR (dB)
60
60
40
40
20
PSRR+ PSRR-
07416-033
20
PSRR+ PSRR- 100 1k 10k FREQUENCY (Hz) 100k 1M
07416-034 07416-050
0 10
100
1k 10k FREQUENCY (Hz)
100k
1M
0 10
Figure 29. PSRR vs. Frequency
140 1.8V VSY 5V 130
VSY = 5V 1k
Figure 32. PSRR vs. Frequency
120
en (nV/Hz)
PSRR (dB)
110
100 VSY = 1.8V
100
90
07416-035
80 -40
10
-25
-10
5
20 35 50 65 TEMPERATURE (C)
80
95
110
125
1
10 FREQUENCY (Hz)
100
1000
Figure 30. PSRR vs. Temperature
Figure 33. Voltage Noise Density vs. Frequency
Rev. A | Page 10 of 20
07416-032
0 100
0 100
ADA4505-2/ADA4505-4
TA = 25C, unless otherwise noted.
80 VSY = 1.8V VIN = 10mV p-p 70 R = 100k L 60 80 VSY = 5V VIN = 10mV p-p 70 R = 100k L 60
OVERSHOOT (%)
OVERSHOOT (%)
50 40 30 20 10
07416-036
50 40 30 20 10 0 10 OS+ OS- 100 CAPACITANCE (pF) 1000
07416-037
OS+ OS-
0 10
100 CAPACITANCE (pF)
1000
Figure 34. Small Signal Overshoot vs. Load Capacitance
Figure 37. Small Signal Overshoot vs. Load Capacitance
T
T
LOAD = 100k || 100pF VSY = 1.8V
LOAD = 100k || 100pF VSY = 5V 3.959V p-p
VOLTAGE (500mV/DIV)
VOLTAGE (1V/DIV)
1.490V p-p
07416-038
TIME (200s/DIV)
TIME (200s/DIV)
Figure 35. Large Signal Transient Response
T
Figure 38. Large Signal Transient Response
T
LOAD = 100k || 100pF VSY = 1.8V
LOAD = 100k || 100pF VSY = 5V
VOLTAGE (2mV/DIV)
07416-040
VOLTAGE (2mV/DIV)
TIME (200s/DIV)
TIME (200s/DIV)
Figure 36. Small Signal Transient Response
Figure 39. Small Signal Transient Response
Rev. A | Page 11 of 20
07416-041
07416-039
ADA4505-2/ADA4505-4
TA = 25C, unless otherwise noted.
35 30 25 20 ADA4505-2 15 10 5 0 ADA4505-4
40 35 30 ADA4505-4, V SY = 5V 25 ISY (A)
ADA4505-4, V SY = 1.8V
ISY (A)
20 15
ADA4505-2, V SY = 1.8V
ADA4505-2, V SY = 5V 10 5
07416-054
07416-055
0
0.5
1.0
1.5
2.0
2.5 3.0 VSY (V)
3.5
4.0
4.5
5.0
0 -40
-25
-10
5
20 35 50 65 TEMPERATURE (C)
80
95
110
125
Figure 40. Supply Current vs. Supply Voltage
Figure 43. Total Supply Current vs. Temperature
VSY = 1.8V
2.95V p-p
VSY = 5V
2.95V p-p
INPUT NOISE VOLTAGE (0.5V/DIV)
07416-052
INPUT NOISE VOLTAGE (0.5V/DIV)
TIME (s)
TIME (s)
Figure 41. 0.1 Hz to 10 Hz Noise
0 0
Figure 44. 0.1 Hz to 10 Hz Noise
VSY = 1.8V RL = 100k -20 G = -100
VIN = 0.5V p-p VIN = 1V p-p VIN = 1.7V p-p 100k 1k
VSY = 5V RL = 100k -20 G = -100
CHANNEL SEPARATION (dB)
CHANNEL SEPARATION (dB)
-40 -60 -80 -100 -120 -140 100
-40 -60 -80 -100 -120 -140 100
100k 1k
VIN = 1V p-p VIN = 2V p-p VIN = 3V p-p VIN = 4V p-p VIN = 4.99V p-p
07416-057
07416-053
1k FREQUENCY (Hz)
10k
100k
1k FREQUENCY (Hz)
10k
100k
Figure 42. Channel Separation vs. Frequency
Figure 45. Channel Separation vs. Frequency
Rev. A | Page 12 of 20
07416-058
ADA4505-2/ADA4505-4
TA = 25C, unless otherwise noted.
1.8 VSY = 1.8V VIN = 1.7V G=1 RL = 100k
6 VSY = 5V VIN = 4.9V G=1 RL = 100k
1.5
5
OUTPUT SWING (V)
0.9
OUTPUT SWING (V)
07416-059
1.2
4
3
0.6
2
0.3
1
100
1k FREQUENCY (Hz)
10k
100k
100
1k FREQUENCY (Hz)
10k
100k
Figure 46. Output Swing vs. Frequency
Figure 47. Output Swing vs. Frequency
Rev. A | Page 13 of 20
07416-060
0 10
0 10
ADA4505-2/ADA4505-4 THEORY OF OPERATION
The ADA4505-2/ADA4505-4 are unity-gain stable CMOS railto-rail input/output operational amplifiers designed to optimize performance in current consumption, PSRR, CMRR, and zero crossover distortion, all embedded in a small package. The typical offset voltage is 500 V, with a low peak-to-peak voltage noise of 2.95 V from 0.1 Hz to 10 Hz and a voltage noise density of 65 nV/Hz at 1 kHz. The ADA4505-2/ADA4505-4 are designed to solve two key problems in low voltage battery-powered applications: battery voltage decrease over time and rail-to-rail input stage distortion. In battery-powered applications, the supply voltage available to the IC is the voltage of the battery. Unfortunately, the voltage of a battery decreases as it discharges itself through the load. This voltage drop over the lifetime of the battery causes an error in the output of the op amps. Some applications requiring precision measurements during the entire lifetime of the battery use voltage regulators to power up the op amps as a solution. If a design uses standard battery cells, the op amps experience a supply voltage change from roughly 3.2 V to 1.8 V during the lifetime of the battery. This means that for a PSRR of 70 dB minimum in a typical op amp, the input-referred offset error is approximately 440 V. If the same application uses the ADA4505-2/ADA4505-4 with a 100 dB minimum PSRR, the error is only 14 V. It is possible to calibrate this error out or to use an external voltage regulator to power the op amp, but these solutions can increase system cost and complexity. The ADA4505-2/ADA4505-4 solve the impasse with no additional cost or error-nullifying circuitry. The second problem with battery-powered applications is the distortion caused by the standard rail-to-rail input stage. Using a CMOS non-rail-to-rail input stage (that is, a single differential pair) limits the input voltage to approximately one VGS (gatesource voltage) away from one of the supply lines. Because VGS for normal operation is commonly over 1 V, a single differential pair input stage op amp greatly restricts the allowable input voltage range when using a low supply voltage. This limitation restricts the number of applications where the non-rail-to-rail input op amp was originally intended to be used. To solve this problem, a dual differential pair input stage is usually implemented (see Figure 48); however, this technique has its own drawbacks. One differential pair amplifies the input signal when the commonmode voltage is on the high end, whereas the other pair amplifies the input signal when the common-mode voltage is on the low end. This method also requires control circuitry to operate the two differential pairs appropriately. Unfortunately, this topology leads to a very noticeable and undesirable problem: if the signal level moves through the range where one input stage turns off and the other one turns on, noticeable distortion occurs (see Figure 49).
VDD VBIAS
VIN+
Q3
Q1
Q2
Q4
VIN- IB
IB
VSS
Figure 48. Typical Dual Differential Pair Input Stage Op Amp (Dual PMOS Q1 and Q2 Transistors Form the Lower End of the Input Voltage Range; Dual NMOS Q3 and Q4 Transistors Form the Upper End)
300 250 200 150 100 50
VOS (V)
VSY = 5V TA = 25C
0 -50 -100 -150 -200 -250 0 0.5 1.0 1.5 2.0 2.5 3.0 VCM (V) 3.5 4.0 4.5 5.0
07416-044
-300
Figure 49. Typical Input Offset Voltage vs. Common-Mode Voltage Response in a Dual Differential Pair Input Stage Op Amp (Powered by 5 V Supply; Results of Approximately 100 Units per Graph Are Displayed)
This distortion forces the designer to devise impractical ways to avoid the crossover distortion areas, therefore narrowing the common-mode dynamic range of the operational amplifier. The ADA4505-2/ADA4505-4 solve this crossover distortion problem by using an on-chip charge pump to power the input differential pair. The charge pump creates a supply voltage higher than the voltage of the battery, allowing the input stage to handle a wide range of input signal voltages without using a second differential pair. With this solution, the input voltage can vary from one supply extreme to the other with no distortion, thereby restoring the full common-mode dynamic range of the op amp.
Rev. A | Page 14 of 20
07416-043
ADA4505-2/ADA4505-4
The charge pump has been carefully designed so that switching noise components at any frequency, both within and beyond the amplifier bandwidth, are much lower than the thermal noise floor. Therefore, the spurious-free dynamic range (SFDR) is limited only by the input signal and the thermal or flicker noise. There is no intermodulation between input signal and switching noise. Figure 50 displays a typical front-end section of an operational amplifier with an on-chip charge pump.
VPP = POSITIVE PUMPED VOLTAGE = VDD + 1.8V VPP VBIAS VDD
Figure 51 shows the typical response of two devices from Figure 9, which shows the input offset voltage vs. input common-mode voltage for 10 devices. Figure 51 is expanded to make it easier to compare with Figure 49, which shows the typical input offset voltage vs. common-mode voltage response in a dual differential pair input stage op amp.
300 250 200 150 100 50 VSY = 5V TA = 25C
VOS (V)
OUT
07416-045
0 -50 -100 -150 -200 -250
+IN
Q1
Q2
-IN
CASCODE STAGE AND RAIL-TO-RAIL OUTPUT STAGE
VSS
0
0.5
1.0
1.5
2.0
Figure 50. Typical Front-End Section of an Op Amp with Embedded Charge Pump
2.5 3.0 VCM (V)
3.5
4.0
4.5
5.0
Figure 51. Input Offset Voltage vs. Input Common-Mode Voltage Response (Powered by a 5 V Supply; Results of Two Units Are Displayed)
This solution improves the CMRR performance tremendously. For example, if the input varies from rail to rail on a 2.5 V supply rail, using a part with a CMRR of 70 dB minimum, an input-referred error of 790 V is introduced. Another part with a CMRR of 52 dB minimum generates a 6.3 mV error. The ADA4505-2/ADA4505-4 CMRR of 90 dB minimum causes only a 79 V error. As with the PSRR error, there are complex ways to minimize this error, but the ADA4505-2/ADA4505-4 solve this problem without incurring unnecessary circuitry complexity or increased cost.
Rev. A | Page 15 of 20
07416-046
-300
ADA4505-2/ADA4505-4 APPLICATIONS INFORMATION
PULSE OXIMETER CURRENT SOURCE
A pulse oximeter is a noninvasive medical device used for measuring continuously the percentage of hemoglobin (Hb) saturated with oxygen and the pulse rate of a patient. Hemoglobin that is carrying oxygen (oxyhemoglobin) absorbs light in the infrared (IR) region of the spectrum; hemoglobin that is not carrying oxygen (deoxyhemoglobin) absorbs visible red (R) light. In pulse oximetry, a clip containing two LEDs (sometimes more, depending on the complexity of the measurement algorithm) and the light sensor (photodiode) is placed on the finger or earlobe of the patient. One LED emits red light (600 nm to 700 nm) and the other emits light in the near IR (800 nm to 900 nm) region. The clip is connected by a cable to a processor unit. The LEDs are rapidly and sequentially excited by two current sources (one for each LED), whose dc levels depend on the LED being driven, based on manufacturer requirements; the detector is synchronized to capture the light from each LED as it is transmitted through the tissue. An example design of a dc current source driving the red and infrared LEDs is shown in Figure 52. These dc current sources allow 62.5 mA and 101 mA to flow through the red and infrared LEDs, respectively. First, to prolong battery life, the LEDs are driven only when needed. One third of the ADG733 SPDT analog switch is used to disconnect/connect the 1.25 V voltage reference from/to each current circuit. When driving the LEDs, the ADR1581 1.25 V voltage reference is buffered by one half of the ADA4505-2; the presence of this voltage on the noninverting input forces the output of the op amp (due to the negative feedback) to maintain a level that causes its inverting input to track the noninverting pin. Therefore, the 1.25 V appears in parallel with the 20 R1 or 12.4 R5 current source resistor, creating the flow of the 62.5 mA or 101 mA current through the red or infrared LED as the output of the op amp turns on the Q1 or Q2 N-MOSFET IRLMS2002. The maximum total quiescent currents for one half of the ADA4505-2, the ADR1581, and the ADG733 are 15 A, 70 A, and 1 A, respectively, for a total of 86 A current consumption (430 W power consumption) per circuit, which is good for a system powered by a battery. If the accuracy and temperature drift of the total design need to be improved, a more accurate and low temperature coefficient drift voltage reference and current source resistor should be used. C3 and C4 are used to improve stabilization of U1; R3 and R7 are used to provide some current limit into the U1 inverting pin; and R2 and R6 are used to slow the rise time of the N-MOSFET when it turns on. These elements may not be needed, or some bench adjustments may be required.
+5V CONNECT TO RED LED +5V C1 0.1F 62.5mA R2 V 22 OUT1 Q1 IRLMS2002 R3 1k R1 20 0.1% 1/4 W MIN
8
C2 0.1F U1 1/2 U2 ADG733 +5V R4 53.6k VREF = 1.25V U3 ADR1581
ADA4505-2
5
16 VDD
14 D1
S1A 12 S1B 13
7
V+ V-
4
6
15 D2
S2A 2 S2B 1
C3 22pF 4 D3
S3A 5 S3B 3
RED CURRENT SOURCE
8 GND VSS
9 A2 10 A1 11 A0 6 EN 7
CONNECT TO INFRARED LED U1 1/2 +5V
101mA R6 22 VOUT2 Q2 IRLMS2002 R7 1k
ADA4505-2
8 1
V+ V-
4
3
2
I_BIT2 I_BIT1 I_BIT0 I_ENA
C4 22pF
Figure 52. Pulse Oximeter Red and Infrared Current Sources Using the ADA4505-2 as a Buffer to the Voltage Reference Device
Rev. A | Page 16 of 20
07416-047
R5 INFRARED CURRENT 12.4 SOURCE 0.1% 1/2 W MIN
ADA4505-2/ADA4505-4
FOUR-POLE LOW-PASS BUTTERWORTH FILTER FOR GLUCOSE MONITOR
There are several methods of glucose monitoring: spectroscopic absorption of infrared light in the 2 m to 2.5 m range, reflectance spectrophotometry, and the amperometric type using electrochemical strips with glucose oxidase enzymes. The amperometric type generally uses three electrodes: a reference electrode, a control electrode, and a working electrode. Although this is a very old and widely used technique, signal-to-noise ratio and repeatability can be improved using the ADA4505-2/ ADA4505-4 family, with its low peak-to-peak voltage noise of 2.95 V from 0.1 Hz to 10 Hz and voltage noise density of 65 nV/Hz at 1 kHz. Another consideration is operation from a 3.3 V battery. Glucose signal currents are usually less than 3 A full scale, so the I-to-V converter requires low input bias current. The ADA4505-2/ ADA4505-4 family is an excellent choice because it provides 0.5 pA typical and 2 pA maximum of input bias current at ambient temperature. A low-pass filter with a cutoff frequency of 80 Hz to 100 Hz is desirable in a glucose meter device to remove extraneous noise; this can be a simple two-pole or four-pole Butterworth filter. Low power op amps with bandwidths of 50 kHz to 500 kHz should be adequate. The ADA4505-2/ADA4505-4 family, with its 50 kHz GBP and 7 A typical current consumption, meets these requirements. A circuit design of a four-pole Butterworth filter (preceded by a one-pole low-pass filter) is shown in Figure 53. With a 3.3 V battery, the total power consumption of this design is 198 W typical at ambient temperature.
C1 1000pF R1 5M +3.3V WORKING CONTROL
3 8
+3.3V V+
1
R2 22.6k
R3 22.6k C3 0.047F
ADA4505-2
5 8
U1 1/2
+3.3V R5 22.6k C5 0.047F
2
REFERENCE
V-
2 4
ADA4505-2
C2 0.1F
U1 1/2
V+
7
R4 22.6k
ADA4505-2
3 8
U2 1/2
V-
6 4
V+
1
V-
4
VOUT
C4 0.1F
DUPLICATE OF CIRCUIT ABOVE
07416-048
Figure 53. Four-Pole Butterworth Filter That Can Be Used in a Glucose Meter
Rev. A | Page 17 of 20
ADA4505-2/ADA4505-4 OUTLINE DIMENSIONS
3.20 3.00 2.80
3.20 3.00 2.80 PIN 1
8
5
1
5.15 4.90 4.65
4
0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 1.10 MAX 8 0 0.80 0.60 0.40
0.23 0.08
COPLANARITY 0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 54. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
1.460 1.420 SQ 1.380
0.650 0.595 0.540 SEATING PLANE 0.340 0.320 0.300
3 2 1
BALL 1 IDENTIFIER
A
B
0.50 BALL PITCH TOP VIEW 0.380 0.355 0.330 COPLANARITY 0.075 BOTTOM VIEW 0.270 0.240 0.210
(BALL SIDE UP)
C
Figure 55. 8-Ball Wafer Level Chip Scale Package [WLCSP] (CB-8-2) Dimensions shown in millimeters
Rev. A | Page 18 of 20
011008-B
ADA4505-2/ADA4505-4
5.10 5.00 4.90
14
8
4.50 4.40 4.30
1 7
6.40 BSC
PIN 1 0.65 BSC 1.05 1.00 0.80 0.15 0.05 COPLANARITY 0.10 1.20 MAX 0.20 0.09 8 0
0.30 0.19
SEATING PLANE
0.75 0.60 0.45
061908-A
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 56. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters
ORDERING GUIDE
Model ADA4505-2ACBZ-RL 1 ADA4505-2ACBZ-R71 ADA4505-2ARMZ-R21 ADA4505-2ARMZ-RL1 ADA4505-4ARUZ1 ADA4505-4ARUZ-RL1
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Package Description 8-Ball WLCSP 8-Ball WLCSP 8-Lead MSOP 8-Lead MSOP 14-Lead TSSOP 14-Lead TSSOP
Package Option CB-8-2 CB-8-2 RM-8 RM-8 RU-14 RU-14
Branding A21 A21 A21 A21
Z = RoHS Compliant Part.
Rev. A | Page 19 of 20
ADA4505-2/ADA4505-4 NOTES
(c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07416-0-10/08(A)
Rev. A | Page 20 of 20

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